Semiconductor integrated circuits (ICs) are commonly fabricated by etching and depositing materials to form circuit patterns in layers on a silicon wafer. In a conventional fabrication process, the ICs are formed from silicon wafers processed in a high vacuum, plasma reaction chamber. During such a process, an electrostatic clamp is used to hold the wafer in position in the chamber. FIGS. 1a and 1b illustrate a top view and side view, respectively, of an existing electrostatic clamp that can be used to hold a wafer for etching/vapor deposition processing in a plasma reaction chamber.
Referring to FIG. 1a, electrostatic clamp 10 includes a circular "chuck" 11 having two wafer attachment surface segments 12a and 12b. Surface segments 12a and 12b are constructed from an electrical insulating material. During the plasma reaction process, a wafer is attached to electrostatic clamp 10 which is positioned in the plasma region of the reaction chamber (not explicitly shown).
Referring to FIG. 1b, which is a side view of the electrostatic clamp shown in FIG. 1a, high voltage electrodes 16a and 16b are buried, respectively, in insulated surface segments 12a and 12b. Each electrode 16a and 16b is connected to a respective positive and negative output pole of high voltage DC power supply 14. A silicon wafer 18 to be processed in the reaction chamber is placed against the attaching surface 12 of electrostatic clamp 10. In an automated fabrication process, a robot arm (not explicitly shown) can be used to place the wafer against the surface of the clamp and also retrieve the wafer after the process is completed. Alternatively, the wafer can be manually placed on, or retrieved from, surface 12 of the clamp.
To operate electrostatic clamp 10, high voltage DC power supply 14 is activated. For the configuration depicted in FIG. 1b, a positive voltage potential is applied to insulated surface segment 12a, and a negative voltage is applied to insulated surface segment 12b. Consequently, an electrostatic field is generated on surface segments 12a and 12b, which induces a distribution of electrical charges on the opposing surface segments of silicon wafer 18 (an electrical conductor). Simplistically, the wafer surface region nearest the positively charged surface segment 12a becomes negatively charged, and the wafer surface region nearest the negatively charged surface segment 12b becomes positively charged. These localized regions of opposite polarities, which are generated between the surface segments 12 and wafer 18, create an attractive force that holds the wafer to the surface of the clamp. Subsequently, after the etching/deposition process is completed, DC power supply 14 is turned off and the wafer is retrieved from the surface of the electrostatic clamp.
A major problem encountered with existing electrostatic clamps is that, for a significant duration after the "clamping" voltage is turned off, a substantial electrostatic charge remains on the opposing surfaces of the wafer and the clamp. These residual charges create an inherent, but undesirable, clamping force that is commonly referred to as "after-cling". This after-cling, or residual attractive force, continues to hold the wafer to the clamp after the clamp is turned off. Consequently, a significant number of these "stuck" wafers can be damaged as they are removed from the clamp unless the process is slowed enough to compensate for this after-cling problem.
In a different arrangement from that illustrated by FIG. 1b, wafer 18 and clamp 10 can be inverted in the reaction chamber. In other words, the attaching surface of clamp 10 is oriented downwards in FIG. 1b or towards the bottom of the chamber. Consequently, after the etching/deposition process is completed and the electrostatic clamp is turned off, the "after-cling" forces hold the wafer to the clamp but in an inverted position. Therefore, these "stuck" inverted wafers must be retrieved from the clamp very cautiously to keep them from dropping to the floor of the chamber. This problem complicates the wafer retrieval process and increases the overall IC fabrication time.
One technique that can be used to dislodge a "stuck" wafer from an electrostatic clamp is to lower the DC "clamping" voltage so that the wafer is held only lightly by the clamp. The resulting after-cling forces may then be overcome relatively easily by using mechanical lift pins to remove the wafer from the clamp. However, this technique is undesirable for a number of reasons. For example, there is a danger of suddenly dislodging the wafer from the clamp and losing it during such handling. Furthermore, mechanical lift pins affect the uniformity of the electrical field generated during the reaction process which, in turn, degrades the reliability of the IC fabrication process. Also, for the most part, it is desirable to control the temperature of the wafer during the reaction process. Therefore, a pressurized gas (e.g., helium), which has good heat transmission properties, is dispersed in the region between the wafer and the surface of the clamp. The helium gas functions primarily to transfer heat from the wafer to the clamp and thereby cool the wafer during the reaction process. However, to cool the wafer most effectively, the wafer is held tightly to the surface of the clamp so that the pressurized-gas medium can more efficiently transfer heat from the wafer to the surface of the clamp. So, in practice, the clamping force that is typically used is relatively high, which produces a high after-cling force on the wafer.